|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt %s -S -passes=msan 2>&1 | FileCheck %s |
| 3 | + |
| 4 | +target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" |
| 5 | +target triple = "x86_64-unknown-linux-gnu" |
| 6 | + |
| 7 | +declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone |
| 8 | +define i64 @test_ctlz_i64_zeropoison(i64 %v) #0 { |
| 9 | +; CHECK-LABEL: @test_ctlz_i64_zeropoison( |
| 10 | +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 |
| 11 | +; CHECK-NEXT: call void @llvm.donothing() |
| 12 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0 |
| 13 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0:![0-9]+]] |
| 14 | +; CHECK: 2: |
| 15 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4:[0-9]+]] |
| 16 | +; CHECK-NEXT: unreachable |
| 17 | +; CHECK: 3: |
| 18 | +; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.ctlz.i64(i64 [[V:%.*]], i1 true) |
| 19 | +; CHECK-NEXT: store i64 0, ptr @__msan_retval_tls, align 8 |
| 20 | +; CHECK-NEXT: ret i64 [[RES]] |
| 21 | +; |
| 22 | + %res = call i64 @llvm.ctlz.i64(i64 %v, i1 true) ; <<i64>> [#uses=1] |
| 23 | + ret i64 %res |
| 24 | +} |
| 25 | +define i64 @test_ctlz_i64_nozeropoison(i64 %v) #0 { |
| 26 | +; CHECK-LABEL: @test_ctlz_i64_nozeropoison( |
| 27 | +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 |
| 28 | +; CHECK-NEXT: call void @llvm.donothing() |
| 29 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0 |
| 30 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]] |
| 31 | +; CHECK: 2: |
| 32 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 33 | +; CHECK-NEXT: unreachable |
| 34 | +; CHECK: 3: |
| 35 | +; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.ctlz.i64(i64 [[V:%.*]], i1 false) |
| 36 | +; CHECK-NEXT: store i64 0, ptr @__msan_retval_tls, align 8 |
| 37 | +; CHECK-NEXT: ret i64 [[RES]] |
| 38 | +; |
| 39 | + %res = call i64 @llvm.ctlz.i64(i64 %v, i1 false) ; <<i64>> [#uses=1] |
| 40 | + ret i64 %res |
| 41 | +} |
| 42 | + |
| 43 | +declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1) nounwind readnone |
| 44 | +define <2 x i64> @test_ctlz_v2i64_zeropoison(<2 x i64> %v) #0 { |
| 45 | +; CHECK-LABEL: @test_ctlz_v2i64_zeropoison( |
| 46 | +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8 |
| 47 | +; CHECK-NEXT: call void @llvm.donothing() |
| 48 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to i128 |
| 49 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP2]], 0 |
| 50 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]] |
| 51 | +; CHECK: 3: |
| 52 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 53 | +; CHECK-NEXT: unreachable |
| 54 | +; CHECK: 4: |
| 55 | +; CHECK-NEXT: [[RES:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[V:%.*]], i1 true) |
| 56 | +; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8 |
| 57 | +; CHECK-NEXT: ret <2 x i64> [[RES]] |
| 58 | +; |
| 59 | + %res = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %v, i1 true) ; <<2 x i64>> [#uses=1] |
| 60 | + ret <2 x i64> %res |
| 61 | +} |
| 62 | +define <2 x i64> @test_ctlz_v2i64_nozeropoison(<2 x i64> %v) #0 { |
| 63 | +; CHECK-LABEL: @test_ctlz_v2i64_nozeropoison( |
| 64 | +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8 |
| 65 | +; CHECK-NEXT: call void @llvm.donothing() |
| 66 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to i128 |
| 67 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP2]], 0 |
| 68 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]] |
| 69 | +; CHECK: 3: |
| 70 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 71 | +; CHECK-NEXT: unreachable |
| 72 | +; CHECK: 4: |
| 73 | +; CHECK-NEXT: [[RES:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[V:%.*]], i1 false) |
| 74 | +; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8 |
| 75 | +; CHECK-NEXT: ret <2 x i64> [[RES]] |
| 76 | +; |
| 77 | + %res = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %v, i1 false) ; <<2 x i64>> [#uses=1] |
| 78 | + ret <2 x i64> %res |
| 79 | +} |
| 80 | + |
| 81 | +declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone |
| 82 | +define i64 @test_cttz_i64_zeropoison(i64 %v) #0 { |
| 83 | +; CHECK-LABEL: @test_cttz_i64_zeropoison( |
| 84 | +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 |
| 85 | +; CHECK-NEXT: call void @llvm.donothing() |
| 86 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0 |
| 87 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]] |
| 88 | +; CHECK: 2: |
| 89 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 90 | +; CHECK-NEXT: unreachable |
| 91 | +; CHECK: 3: |
| 92 | +; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.cttz.i64(i64 [[V:%.*]], i1 true) |
| 93 | +; CHECK-NEXT: store i64 0, ptr @__msan_retval_tls, align 8 |
| 94 | +; CHECK-NEXT: ret i64 [[RES]] |
| 95 | +; |
| 96 | + %res = call i64 @llvm.cttz.i64(i64 %v, i1 true) ; <<i64>> [#uses=1] |
| 97 | + ret i64 %res |
| 98 | +} |
| 99 | +define i64 @test_cttz_i64_nozeropoison(i64 %v) #0 { |
| 100 | +; CHECK-LABEL: @test_cttz_i64_nozeropoison( |
| 101 | +; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8 |
| 102 | +; CHECK-NEXT: call void @llvm.donothing() |
| 103 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0 |
| 104 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]] |
| 105 | +; CHECK: 2: |
| 106 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 107 | +; CHECK-NEXT: unreachable |
| 108 | +; CHECK: 3: |
| 109 | +; CHECK-NEXT: [[RES:%.*]] = call i64 @llvm.cttz.i64(i64 [[V:%.*]], i1 false) |
| 110 | +; CHECK-NEXT: store i64 0, ptr @__msan_retval_tls, align 8 |
| 111 | +; CHECK-NEXT: ret i64 [[RES]] |
| 112 | +; |
| 113 | + %res = call i64 @llvm.cttz.i64(i64 %v, i1 false) ; <<i64>> [#uses=1] |
| 114 | + ret i64 %res |
| 115 | +} |
| 116 | + |
| 117 | +declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1) nounwind readnone |
| 118 | +define <2 x i64> @test_cttz_v2i64_zeropoison(<2 x i64> %v) #0 { |
| 119 | +; CHECK-LABEL: @test_cttz_v2i64_zeropoison( |
| 120 | +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8 |
| 121 | +; CHECK-NEXT: call void @llvm.donothing() |
| 122 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to i128 |
| 123 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP2]], 0 |
| 124 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]] |
| 125 | +; CHECK: 3: |
| 126 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 127 | +; CHECK-NEXT: unreachable |
| 128 | +; CHECK: 4: |
| 129 | +; CHECK-NEXT: [[RES:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[V:%.*]], i1 true) |
| 130 | +; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8 |
| 131 | +; CHECK-NEXT: ret <2 x i64> [[RES]] |
| 132 | +; |
| 133 | + %res = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %v, i1 true) ; <<2 x i64>> [#uses=1] |
| 134 | + ret <2 x i64> %res |
| 135 | +} |
| 136 | +define <2 x i64> @test_cttz_v2i64_nozeropoison(<2 x i64> %v) #0 { |
| 137 | +; CHECK-LABEL: @test_cttz_v2i64_nozeropoison( |
| 138 | +; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, ptr @__msan_param_tls, align 8 |
| 139 | +; CHECK-NEXT: call void @llvm.donothing() |
| 140 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[TMP1]] to i128 |
| 141 | +; CHECK-NEXT: [[_MSCMP:%.*]] = icmp ne i128 [[TMP2]], 0 |
| 142 | +; CHECK-NEXT: br i1 [[_MSCMP]], label [[TMP3:%.*]], label [[TMP4:%.*]], !prof [[PROF0]] |
| 143 | +; CHECK: 3: |
| 144 | +; CHECK-NEXT: call void @__msan_warning_noreturn() #[[ATTR4]] |
| 145 | +; CHECK-NEXT: unreachable |
| 146 | +; CHECK: 4: |
| 147 | +; CHECK-NEXT: [[RES:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[V:%.*]], i1 false) |
| 148 | +; CHECK-NEXT: store <2 x i64> zeroinitializer, ptr @__msan_retval_tls, align 8 |
| 149 | +; CHECK-NEXT: ret <2 x i64> [[RES]] |
| 150 | +; |
| 151 | + %res = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %v, i1 false) ; <<2 x i64>> [#uses=1] |
| 152 | + ret <2 x i64> %res |
| 153 | +} |
| 154 | + |
| 155 | + |
| 156 | +attributes #0 = { sanitize_memory } |
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