arcv: Update Newlib and Picolibc sections

Signed-off-by: Yuriy Kolerov <ykolerov@synopsys.com>

Author: kolerov

docs/arcv/building-newlib.md

@@ -1,5 +1,12 @@
 # Building applications with Newlib
 
+!!! warning
+
+ Newlib is considered as deprecated standard library for ARC-V
+ GNU toolchain. It will be completely removed in the future
+ releases. Please, consider migrating to
+ [the Picolibc-based toolchain](./building-picolibc.md).
+
 GNU toolchain for ARC-V targets uses `riscv64-snps-elf` prefix for
 all tools. For example, GCC binary has name `riscv64-snps-elf-gcc`.
 
@@ -15,7 +22,7 @@ Usually, to compile an application you need to set target options:
 All together they correspond to a particular prebuilt standard library. Refer
 [Understanding ARC-V configurations](./multilib.md) for details.
 
-## Getting Started
+## Getting started
 
 Consider a simple code example:
 
@@ -51,7 +58,7 @@ $ riscv64-snps-elf-gcc \
 Refer to [Running on nSIM](./nsim.md) and [Running on QEMU](./qemu.md) to learn how
 to run ARC-V examples on nSIM or QEMU simulator.
 
-## Using Custom Linker Script
+## Using custom linker script
 
 GNU toolchain for ARC-V is shipped with a custom ARC-V specific startup code
 and a custom linker script. They are intended to be used in pair by passing
@@ -106,7 +113,24 @@ Using custom code and data sections is essential for 64-bit targets. By default,
 this memory layout may be not acceptable for 64-bit targets. That is why in
 the GNU toolchain 64-bit targets are available only with `medany` memory model.
 
-## Tuning Instruction Scheduling
+## Using startup code without CSRs
+
+You can pass `--crt0=no-csr` option to choose a startup code without
+CSRs when `-specs=arcv.specs` is passed:
+
+```
+$ riscv64-snps-elf-gcc \
+ -march=rv32ic_zcb_zcmp_zcmt_zba_zbb_zbs_zicsr \
+ -mabi=ilp32 \
+ -mtune=arc-v-rmx-100-series \
+ -specs=semihost.specs \
+ -specs=arcv.specs \
+ --crt0=no-csr \
+ -T arcv.ld \
+ example.c -o example.elf
+```
+
+## Tuning instruction scheduling
 
 GCC instruction scheduling may be tuned for different ARC-V
 targets using `-mtune=` option:

docs/arcv/index.md

@@ -2,23 +2,6 @@
 
 ## Overview
 
-In `arc-2025.06` release GNU toolchain for ARC-V targets is based on these
-tools and libraries:
-
-* GCC 14.2 with ARC-V specific patches
- * Uses upstream 14.2 release; see [a release announcement](https://lists.gnu.org/archive/html/info-gnu/2024-08/msg00000.html)
- and [a complete list of changes](https://gcc.gnu.org/gcc-14/changes.html).
- * Added full support of tuning instructions scheduling for RMX-100, RMX-500 and RHX-100.
-* Binutils 2.43 with ARC-V specific patches
- * Uses upstream 2.43 release; see [release notes](https://lists.gnu.org/archive/html/info-gnu/2024-08/msg00001.html).
-* GDB 15.1
- * Uses upstream 15.1 release; see [a release announcement](https://lists.gnu.org/archive/html/info-gnu/2024-07/msg00004.html)
- and [a complete list of changes](https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=blob_plain;f=gdb/NEWS;hb=gdb-15.1-release).
-* Newlib 4.4.0 with ARC-V specific patches
- * Uses upstream 4.4.0 release; see [release announcement](https://sourceware.org/pipermail/newlib/2023/020873.html).
- * Caches are enabled automatically when a custom startup file is used.
- * Added support of passing command line arguments through Semihosting interface (works both for nSIM and QEMU simulators).
-
 Supported ARC-V specific features:
 
 * [Tuning GCC instruction scheduling](#tuning-scheduling) for RMX-100, RMX-500, RHX-100 and RPX-100 targets.

mkdocs.yml

@@ -163,8 +163,8 @@ nav:
  - eclipse/other/building.md
  - ARC-V:
  - arcv/index.md
- - arcv/building-newlib.md
  - arcv/building-picolibc.md
+ - arcv/building-newlib.md
  - arcv/multilib.md
  - arcv/nsim.md
  - arcv/qemu.md