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Add toolchain section, update various articles
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docs/assets/favicon.ico

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docs/baremetal/hardware/iotdk.md

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@@ -43,7 +43,16 @@ with `snps_iotdk.cfg` configuration file. Here is an example:
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```text
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$ openocd -f board/snps_iotdk.cfg
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...
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Open On-Chip Debugger 0.9.0-dev-g8ee31a5 (2023-09-27-21:15)
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Licensed under GNU GPL v2
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For bug reports, read
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http://openocd.sourceforge.net/doc/doxygen/bugs.html
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adapter speed: 8000 kHz
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Info : clock speed 8000 kHz
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Info : JTAG tap: arc-em.cpu tap/device found: 0x200444b1 (mfg: 0x258, part: 0x0044, ver: 0x2)
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Info : JTAG tap: arc-em.cpu tap/device found: 0x200444b1 (mfg: 0x258, part: 0x0044, ver: 0x2)
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target state: halted
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target state: halted
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```
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Then connect to the server using GDB:

docs/baremetal/simulators/nsim.md

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@@ -8,7 +8,7 @@ There is no a definite match between TCF templates for nSIM and `-mcpu` values f
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If you want to build a program using GNU toolchain and run it on nSIM simulator , then you have two
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ways of finding right nSIM options:
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1. Find proper nSIM options in [a compatibility table](../../general/compatibility.md).
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1. Find proper nSIM options in [a compatibility table](../../toolchain/compatibility.md).
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2. Use default TCF templates and additional nSIM options.
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There is a table with an a rough matching between `-mcpu` values and TCF templates with additional options:

docs/faq.md renamed to docs/home/faq.md

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more features, like `-mll64` which are not present in `hs34`. ARC HS IPlib template `hs38` doesn’t
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contain double-word load/store, therefore -mcpu=hs38 is not compatible with this template.
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`-mcpu=hs34`, however, is compatible and that is why TCF generator uses this value. Refer
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[Target Specific Options](general/target-options.md) page for a full list of possible `-mcpu`
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[Multiplication Options](../toolchain/mpy-options.md) page for a full list of possible `-mcpu`
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values and what IPlibrary templates they correspond to.
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## There are `can’t resolve symbol` error messages when using `gdbserver` on Linux for ARC targets
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docs/index.md

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(FOSS) for DesignWare ARC Processors:
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* [Release page of GNU toolchain](https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases)
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* [The old embARC web page](https://embarc.org)
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* [The old GNU toolchain documentation](https://foss-for-synopsys-dwc-arc-processors.github.io/toolchain/)
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* [The old embARC web page (second)](https://embarc.org)
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* [THe old embARC web page (first)](https://foss-for-synopsys-dwc-arc-processors.github.io/)

docs/linux/hsdk/uboot-build.md

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!!! info
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* Follow [How to Get The Toolchain](../../general/toolchains.md#how-to-get-the-toolchain)
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* Follow [How to Get The Toolchain](../../toolchain/index.md#how-to-get-the-toolchain)
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guide to get the latest ARC GNU toolchain. Linux toolchain for ARC HS3x/4x (with uClibc or glibc)
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is required.
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* Refer to the original [U-Boot README for HSDK](https://github.com/Screenly/u-boot/blob/master/board/synopsys/hsdk/README)
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docs/simulators/qemu.md

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Run the virtual machine to produce a trace file:
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```shell
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$ qemu-system-arc --trace events=events.trc ...
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qemu-system-arc --trace events=events.trc ...
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```
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Pretty-print the binary trace file (override `<pid>` with QEMU process id for you session):
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```text
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$ <QEMU-source-tree-path>/scripts/simpletrace.py <QEMU-source-tree-path>/target/arc/trace-events trace-<pid>
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<QEMU-source-tree-path>/scripts/simpletrace.py <QEMU-source-tree-path>/target/arc/trace-events trace-<pid>
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```
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## Running Tests
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TCG is the internal language that powers QEMU. There are some assembly tests
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that validate the basic function of several instructions in QEMU.
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Firstly, make sure that QEMU if configured with `--cross-cc-arc=arc-elf32-gcc`
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and `--cross-cc-arc64=arc64-elf-gcc` options. Then after building QEMU use these
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commands to run TCG tests:
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```shell
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make clean-tcg
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make build-tcg
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make check-tcg
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```

docs/testing/qemu.md

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