@@ -1289,8 +1289,12 @@ mod dma {
12891289 }
12901290
12911291 let result = unsafe {
1292- self . spi
1293- . start_write_bytes_dma ( buffer. first ( ) , bytes_to_write, & mut self . channel . tx )
1292+ self . spi . start_write_bytes_dma (
1293+ buffer. first ( ) ,
1294+ bytes_to_write,
1295+ & mut self . channel . tx ,
1296+ true ,
1297+ )
12941298 } ;
12951299 if let Err ( e) = result {
12961300 return Err ( ( e, self , buffer) ) ;
@@ -1317,8 +1321,12 @@ mod dma {
13171321 }
13181322
13191323 let result = unsafe {
1320- self . spi
1321- . start_read_bytes_dma ( buffer. first ( ) , bytes_to_read, & mut self . channel . rx )
1324+ self . spi . start_read_bytes_dma (
1325+ buffer. first ( ) ,
1326+ bytes_to_read,
1327+ & mut self . channel . rx ,
1328+ true ,
1329+ )
13221330 } ;
13231331 if let Err ( e) = result {
13241332 return Err ( ( e, self , buffer) ) ;
@@ -1451,8 +1459,12 @@ mod dma {
14511459 }
14521460
14531461 let result = unsafe {
1454- self . spi
1455- . start_read_bytes_dma ( buffer. first ( ) , bytes_to_read, & mut self . channel . rx )
1462+ self . spi . start_read_bytes_dma (
1463+ buffer. first ( ) ,
1464+ bytes_to_read,
1465+ & mut self . channel . rx ,
1466+ false ,
1467+ )
14561468 } ;
14571469 if let Err ( e) = result {
14581470 return Err ( ( e, self , buffer) ) ;
@@ -1529,8 +1541,12 @@ mod dma {
15291541 }
15301542
15311543 let result = unsafe {
1532- self . spi
1533- . start_write_bytes_dma ( buffer. first ( ) , bytes_to_write, & mut self . channel . tx )
1544+ self . spi . start_write_bytes_dma (
1545+ buffer. first ( ) ,
1546+ bytes_to_write,
1547+ & mut self . channel . tx ,
1548+ false ,
1549+ )
15341550 } ;
15351551 if let Err ( e) = result {
15361552 return Err ( ( e, self , buffer) ) ;
@@ -2262,16 +2278,19 @@ pub trait InstanceDma: Instance {
22622278 first_desc : * mut DmaDescriptor ,
22632279 len : usize ,
22642280 tx : & mut TX ,
2281+ full_duplex : bool ,
22652282 ) -> Result < ( ) , Error > {
22662283 let reg_block = self . register_block ( ) ;
22672284 self . configure_datalen ( len as u32 * 8 ) ;
22682285
22692286 tx. is_done ( ) ;
22702287
2271- // disable MISO and re-enable MOSI
2272- reg_block
2273- . user ( )
2274- . modify ( |_, w| w. usr_miso ( ) . bit ( false ) . usr_mosi ( ) . bit ( true ) ) ;
2288+ // disable MISO and re-enable MOSI (DON'T do it for half-duplex)
2289+ if full_duplex {
2290+ reg_block
2291+ . user ( )
2292+ . modify ( |_, w| w. usr_miso ( ) . bit ( false ) . usr_mosi ( ) . bit ( true ) ) ;
2293+ }
22752294
22762295 self . enable_dma ( ) ;
22772296 self . update ( ) ;
@@ -2301,16 +2320,19 @@ pub trait InstanceDma: Instance {
23012320 desc : * mut DmaDescriptor ,
23022321 data_length : usize ,
23032322 rx : & mut RX ,
2323+ full_duplex : bool ,
23042324 ) -> Result < ( ) , Error > {
23052325 let reg_block = self . register_block ( ) ;
23062326 self . configure_datalen ( data_length as u32 * 8 ) ;
23072327
23082328 rx. is_done ( ) ;
23092329
2310- // re-enable MISO and disable MOSI
2311- reg_block
2312- . user ( )
2313- . modify ( |_, w| w. usr_miso ( ) . bit ( true ) . usr_mosi ( ) . bit ( false ) ) ;
2330+ // re-enable MISO and disable MOSI (DON'T do it for half-duplex)
2331+ if full_duplex {
2332+ reg_block
2333+ . user ( )
2334+ . modify ( |_, w| w. usr_miso ( ) . bit ( true ) . usr_mosi ( ) . bit ( false ) ) ;
2335+ }
23142336
23152337 self . enable_dma ( ) ;
23162338 self . update ( ) ;
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