ci: Enable C2 hil tests

Author: SergioGasquez

.github/workflows/hil.yml

@@ -101,6 +101,8 @@ jobs:
  matrix:
  target:
  # RISC-V devices:
+ - soc: esp32c2
+ runner: esp32c2-jtag
  - soc: esp32c3
  runner: esp32c3-usb
  - soc: esp32c6

hil-test/tests/spi_full_duplex_dma.rs

@@ -280,8 +280,8 @@ mod tests {
  let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
  let sclk = io.pins.gpio0;
  let miso = io.pins.gpio2;
- let mosi = io.pins.gpio4;
- let cs = io.pins.gpio5;
+ let mosi = io.pins.gpio3;
+ let cs = io.pins.gpio8;
 
  let dma = Dma::new(peripherals.DMA);