Update torch-xpu-ops pin (ATen XPU implementation) (pytorch#133850)

Bugfixings for PyTorch 2.5, 1. Using SYCL group algorithm API instead of old style for sub group shift utilities. 2. Add preprocess in reduction kernel for cases requiring data type cast. 3. Make group norm memory format compatible. 4. ZeroTensor: a. Remove unnecessary aten operators registration, or ZeroTensor process is bypassed. b. Align preprocess with intree implementation in aten::copy_. 5. Rebase checkIndexTensorTypes usage. 6. Align latest semantics of PyTorch foreach operators. Return multiple tensors with offset=0. Pull Request resolved: pytorch#133850 Approved by: https://github.com/EikanWang

Author: fengyuan14

third_party/xpu.txt

@@ -1 +1 @@
-35bea25e2e09b92067349a75cd0858a485c444fe
+7eb52196954e5eaf32f791252506b0640f16f200