Remove WATCHDOG_RESET macro and replace it with schedule()

With the v2023.01 uboot software from mainline, all the WATCHDOG_RESET macro has been removed and replaced it with schedule(). Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com>

Author: raajloka

drivers/ddr/altera/sdram_n5x.c

@@ -1394,7 +1394,7 @@ static int cal_data_ocram(phys_addr_t phy_base, u32 addr,
 phybak_p++;
 phybak_num--;
 data++;
-WATCHDOG_RESET();
+schedule();
 };
 
 if (proc == STORE) {

drivers/ddr/altera/sdram_soc32.c

@@ -53,7 +53,7 @@ void sdram_init_ecc_bits(void)
 memset((void *)start_addr, 0, size_init);
 size -= size_init;
 start_addr += size_init;
-WATCHDOG_RESET();
+schedule();
 }
 
 dcache_disable();

drivers/fpga/intel_pr.c

@@ -99,7 +99,7 @@ static int intel_freeze_br_req_ack(fdt_addr_t addr, u32 req_ack)
 break;
 
 udelay(1);
-WATCHDOG_RESET();
+schedule();
 }
 
 return ret;

drivers/spi/cadence_qspi_apb.c

@@ -157,7 +157,7 @@ static unsigned int cadence_qspi_wait_idle(void *reg_base)
 
 start = get_timer(0);
 for ( ; get_timer(start) < timeout ; ) {
-WATCHDOG_RESET();
+schedule();
 if (CQSPI_REG_IS_IDLE(reg_base))
 count++;
 else
@@ -364,7 +364,7 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base, unsigned int reg)
 if ((reg & CQSPI_REG_CMDCTRL_INPROGRESS) == 0)
 break;
 udelay(1);
-WATCHDOG_RESET();
+schedule();
 }
 
 if (!retry) {
@@ -682,7 +682,7 @@ static int cadence_qspi_wait_for_data(struct cadence_spi_priv *priv)
 if (reg)
 return reg;
 udelay(1);
-WATCHDOG_RESET();
+schedule();
 }
 
 return -ETIMEDOUT;
@@ -727,7 +727,7 @@ cadence_qspi_apb_indirect_read_execute(struct cadence_spi_priv *priv,
 rxbuf += bytes_to_read;
 remaining -= bytes_to_read;
 bytes_to_read = cadence_qspi_get_rd_sram_level(priv);
-WATCHDOG_RESET();
+schedule();
 }
 }
 
@@ -898,7 +898,7 @@ cadence_qspi_apb_indirect_write_execute(struct cadence_spi_priv *priv,
 
 bb_txbuf += write_bytes;
 remaining -= write_bytes;
-WATCHDOG_RESET();
+schedule();
 }
 
 /* Check indirect done status */