arm: configs: Clean up the defconfigs for agilex, stratix10, arria10 and cv

Previous commits during the uboot 2022.10_RC rebase, the configs were newly added. This causes some test to fail where it cannot boot to uboot SPL. By adding and removing these configs, it fixes the uboot issues. Signed-off-by: Lokanathan, Raaj <raaj.lokanathan@intel.com>

Author: raajloka

configs/socfpga_arria10_defconfig

@@ -19,17 +19,6 @@ CONFIG_FIT=y
 CONFIG_SPL_FIT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_USE_BOOTARGS=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0xffe3f000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
 CONFIG_BOOTARGS="console=ttyS0,115200"
 CONFIG_BOOTCOMMAND="run fatscript;run prog_core;bridge enable;run distro_bootcmd"
 CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"

configs/socfpga_arria10_nand_defconfig

@@ -6,6 +6,7 @@ CONFIG_ENV_OFFSET=0x200000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL_TEXT_BASE=0xFFE00000
+CONFIG_SYS_MALLOC_LEN=0x4000000
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
 CONFIG_ENV_OFFSET_REDUND=0x210000
@@ -19,17 +20,6 @@ CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=5
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 "
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
-# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0xffe3f000
-CONFIG_SYS_SPL_MALLOC=y
-CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bridge enable; run nandload; run nandboot"
 CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_nand.dtb"
@@ -39,8 +29,19 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_PAD_TO=0x40000
+CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0xffe2b000
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xffe2b000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x15000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_FPGA=y
+CONFIG_SYS_MAXARGS=32
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_CMD_BOOTZ=y
@@ -59,6 +60,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_MTDIDS_DEFAULT="nand0=ffb80000.nand.0"
 CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
 CONFIG_ENV_IS_IN_NAND=y
+CONFIG_ENV_IS_IN_MMC=n
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_VERSION_VARIABLE=y

configs/socfpga_arria10_qspi_defconfig

@@ -20,17 +20,16 @@ CONFIG_SPL_FIT_SOURCE="board/altera/arria10-socdk/fit_spl_uboot.its"
 CONFIG_QSPI_BOOT=y
 CONFIG_BOOTDELAY=5
 CONFIG_USE_BOOTARGS=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_MAX_SIZE=0x40000
-CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-CONFIG_SPL_BSS_START_ADDR=0x3ff00000
+CONFIG_SPL_PAD_TO=0x40000
+CONFIG_SPL_NO_BSS_LIMIT=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
-CONFIG_SPL_STACK=0xffe3f000
+CONFIG_SPL_STACK=0xffe2b000
 CONFIG_SYS_SPL_MALLOC=y
 CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
-CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
-CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
-CONFIG_SPL_BSS_MAX_SIZE=0x100000
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xffe2b000
+CONFIG_SYS_SPL_MALLOC_SIZE=0x15000
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000
 CONFIG_BOOTARGS="console=ttyS0,115200 "
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="bridge enable; run qspiload; run qspiboot"
@@ -41,6 +40,7 @@ CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_FPGA=y
+CONFIG_SYS_MAXARGS=32
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_ASKENV=y