Timer simulation with Quartus

Author: Choaib-ELMADI

Projects/Quartus/Timer/db/.cmp.kpt

@@ -0,0 +1,11 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1727891669961 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.1 Build 993 05/14/2024 SC Lite Edition " "Version 23.1std.1 Build 993 05/14/2024 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1727891669962 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Oct 2 18:54:29 2024 " "Processing started: Wed Oct 2 18:54:29 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1727891669962 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1727891669962 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off timer -c timer " "Command: quartus_map --read_settings_files=on --write_settings_files=off timer -c timer" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1727891669963 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Analysis & Synthesis" 0 -1 1727891670763 ""}
+{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Parallel compilation is enabled and will use 2 of the 2 processors detected" { } { } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Analysis & Synthesis" 0 -1 1727891670764 ""}
+{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "timer.vhd 2 1 " "Found 2 design units, including 1 entities, in source file timer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 timer-rtl " "Found design unit 1: timer-rtl" { } { { "timer.vhd" "" { Text "C:/Users/Choaib ELMADI/Downloads/D.I.F.Y/7. Electronics/2. FPGA/Getting Started with VHDL/Projects/Quartus/Timer/timer.vhd" 16 -1 0 } } } 0 12022 "Found design unit %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1727891688419 ""} { "Info" "ISGN_ENTITY_NAME" "1 timer " "Found entity 1: timer" { } { { "timer.vhd" "" { Text "C:/Users/Choaib ELMADI/Downloads/D.I.F.Y/7. Electronics/2. FPGA/Getting Started with VHDL/Projects/Quartus/Timer/timer.vhd" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1727891688419 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1727891688419 ""}
+{ "Info" "ISGN_START_ELABORATION_TOP" "timer " "Elaborating entity \"timer\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1727891688485 ""}
+{ "Error" "EVRFX_VHDL_FORMAL_HAS_NO_VALUE" "CLOCK_FREQUENCY timer.vhd(5) " "VHDL error at timer.vhd(5): formal port or parameter \"CLOCK_FREQUENCY\" must have actual or default value" { } { { "timer.vhd" "" { Text "C:/Users/Choaib ELMADI/Downloads/D.I.F.Y/7. Electronics/2. FPGA/Getting Started with VHDL/Projects/Quartus/Timer/timer.vhd" 5 0 0 } } } 0 10346 "VHDL error at %2!s!: formal port or parameter \"%1!s!\" must have actual or default value" 0 0 "Analysis & Synthesis" 0 -1 1727891688496 ""}
+{ "Error" "ESGN_TOP_HIER_ELABORATION_FAILURE" "" "Can't elaborate top-level user hierarchy" { } { } 0 12153 "Can't elaborate top-level user hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1727891688497 ""}
+{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 2 s 1 Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "4775 " "Peak virtual memory: 4775 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1727891688667 ""} { "Error" "EQEXE_END_BANNER_TIME" "Wed Oct 2 18:54:48 2024 " "Processing ended: Wed Oct 2 18:54:48 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1727891688667 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:19 " "Elapsed time: 00:00:19" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1727891688667 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:45 " "Total CPU time (on all processors): 00:00:45" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1727891688667 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1727891688667 ""}
+{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 4 s 1 " "Quartus Prime Full Compilation was unsuccessful. 4 errors, 1 warning" { } { } 0 293001 "Quartus Prime %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1727891689452 ""}

Projects/Quartus/Timer/db/prev_cmp_timer.qmsg

@@ -0,0 +1,7 @@
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1727891795022 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 23.1std.1 Build 993 05/14/2024 SC Lite Edition " "Version 23.1std.1 Build 993 05/14/2024 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1727891795023 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Oct 2 18:56:34 2024 " "Processing started: Wed Oct 2 18:56:34 2024" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1727891795023 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1727891795023 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off timer -c timer " "Command: quartus_asm --read_settings_files=off --write_settings_files=off timer -c timer" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1727891795023 ""}
+{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." { } { } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Assembler" 0 -1 1727891795534 ""}
+{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1727891798337 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1727891798542 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 1 Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "4715 " "Peak virtual memory: 4715 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1727891799870 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Oct 2 18:56:39 2024 " "Processing ended: Wed Oct 2 18:56:39 2024" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1727891799870 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1727891799870 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1727891799870 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1727891799870 ""}

Projects/Quartus/Timer/db/timer.(0).cnf.cdb

@@ -0,0 +1,5 @@
+<?xml version="1.0" ?>
+<LOG_ROOT>
+<PROJECT NAME="timer">
+</PROJECT>
+</LOG_ROOT>